• 1.GeneraldescriptionThe74HC138;74HCT138isahigh-speedSi-gateCMOSdeviceandispincompatiblewithLow-powerSchottkyTTLLSTTL.The74HC138 ...
• The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing...
• Technical Information - Philips Semiconductors 74HCT138 Datasheet. Note: The Copyright of this 74HCT138 Datasheet belongs to Philips Semiconductors and is provided for information only.
• Philips Semiconductors Product specification Triacs BT138 series GENERAL DESCRIPTION QUICK REFERENCE DATA Glass passivated triacs in a plastic SYMBOL PARAMETER…
• 74HCT138 Datasheet - 3-to-8 Line Decoder / Demultiplexer. Posted on September 5, 2019September 6, 2019 by Pinout. The 'HCT138 devices are designed for high-performance memory-decoding or...
• HCT02A, HCT14, HCT138A dal distributore di componenti elettronici IC. Nuovo originale PayPal accettato. RFQ HCT02A presso IC Components.

• Hct138 datasheet

• Product data sheet Rev. 7 — 29 February 2016 5 of 20 Nexperia 74HC154; 74HCT154 4-to-16 line decoder/demultiplexer 7. Limiting values Table 4. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO24 packages: Ptot derates linearly at 8 mW/K above 70 × C. The ’ HC138, ’ HC238, ’ HCT138, and ’ HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. 在The Broker Forum在线市场从 以色列 买卖主动和被动电子元器件/零件 74HC138- 데이터시트(무료), 74HC138- Datasheet, 74HC138- 데이타시트, 74HC138- PDF, 74HC138- 가격 구매, 74HC138- 제품상세정보. 74HC138- 쇼핑몰 ... File name Title Type Date; 74HC_HCT138_Q100: 3-to-8 line decoder/demultiplexer; inverting: Data sheet: 2020-04-07: SOT763-1: plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body
• 在The Broker Forum在线市场从 以色列 买卖主动和被动电子元器件/零件
...Decoder (IC 74HCT138) And NAND (IC 74HCT00) Gates Below To Address Memory Range From (IC 74HCT00) gates below to address memory range from E0000H to EFFFFH 13 6 4 Y7 74HCT138.

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• Cascading and/or Data Reception. SN54HCT138 . . . The 'HCT138 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay...
• 74HC_HCT138_Q100. All information provided in this document is subject to legal disclaimers. ... Product data sheet. Rev. 1 — 16 July 2012. 3 of 18. NXP ...
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• The 74HC/HCT138 decoders accept three binary weighted address inputs A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs to Y7). The "138" features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3).
• 3-TO-8 데이터시트, Datasheet(PDF) - Toshiba Semiconductor - TC7MZ138FK_07 Datasheet, Low Voltage 3-to-8 Line Decoder with 5 V Tolerant Inputs and Outputs, Texas Instruments - CD74HC137 Datasheet, Unisonic Technologies - U74HC138_15 Datasheet

• HD74HCT138 Datasheet Download - Hitachi Semiconductor. The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine.